Field of the Invention
The present invention relates to an overcurrent protection circuit, and a semiconductor device and a voltage regulator both equipped with the overcurrent protection circuit.
Background Art
A voltage regulator equipped with a related art overcurrent protection circuit will be described. FIG. 4 is a circuit diagram illustrating the voltage regulator equipped with the related art overcurrent protection circuit. The related art voltage regulator is equipped with a reference voltage circuit 401, NMOS transistors 403, 404, and 405, PMOS transistors 402, 406, and 110, resistors 204 and 205, a power supply terminal 101, a ground terminal 100, and an output terminal 102.
When a reference voltage Vref of the reference voltage circuit 401 is larger than a divided voltage Vfb obtained by dividing an output voltage Vout of the output terminal 102 by the resistors 204 and 205, the potential of a gate of the PMOS transistor 110, which is equivalent to the output of an error amplifier circuit configured by the NMOS transistors 403, 404, and 405, and the PMOS transistors 402 and 406, is lowered to reduce the on resistance of the PMOS transistor 110. Then, the voltage regulator is operated to raise the output voltage Vout and thereby equalize the divided voltage Vfb and the reference voltage Vref each other. When the reference voltage Vref is smaller than the divided voltage Vfb, the potential of the gate of the PMOS transistor 110, which is equivalent to the output of the error amplifier circuit, is made high to increase the on resistance of the PMOS transistor 110. Then, the voltage regulator is operated to reduce the output voltage Vout and thereby equalize the divided voltage Vfb and the reference voltage Vref each other.
The voltage regulator generates a constant output voltage Vout by always holding the divided voltage Vfb and the reference voltage Vref equally (refer to, for example, Patent Document 1 and FIG. 2).
[Patent Document 1]
Japanese Patent Application Laid-Open No. Hei 4 (1992)-195613